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INTEGRATED CIRCUITS
DATA SHEET
P8xCL883; P8xCL884 TELX microcontrollers for CT0 handset/basestation applications
Product specification Supersedes data of 1997 Aug 18 File under Integrated Circuits, IC17 1999 Mar 15
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
CONTENTS 1 2 3 4 5 5.1 5.2 6 6.1 6.2 6.2.1 6.2.2 6.2.3 6.3 6.3.1 6.3.2 6.4 6.5 6.6 6.6.1 6.6.2 6.7 6.7.1 6.7.2 6.8 6.9 6.9.1 6.9.2 6.9.3 7 8 9 10 10.1 10.2 10.3 10.4 10.5 11 12 13 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Special Function Registers (SFRs) I/O facilities Ports Port I/O configuration Alternative Port Function Register (ALTP) Timer/event counters Timer T2 Timer/Counter 2 Control Register (T2CON) MSK modem Watchdog Timer OTP programming OTP programming by a programmer In-System Programming mode Oscillator circuitry Resonator requirements Recommended resonator types Emulation Non-conformance Programming interface/ Transparent mode Low Voltage Detection Edge detection on UART LIMITING VALUES CHARACTERISTICS PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
P8xCL883; P8xCL884
2
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
1 FEATURES
P8xCL883; P8xCL884
* Full static 80C51 CPU; enhanced 8-bit architecture with: - Minimum 6 cycles per instruction (twice as fast as a standard 80C51 core) - Non-page oriented instructions - Direct addressing - Four 8-byte RAM register banks - Stack depth limited only by available internal RAM (maximum 256 bytes) - Multiply, divide, subtract and compare instructions. * 8-bit ports: - P8xCL883: 3 (19 I/O lines) - P8xCL884: 3 (18 I/O lines). * Program Memory: - P8xCL883/P8xCL884: 8-kbyte One Time Programmable (OTP). * 256-byte RAM * 128-byte EEPROM Data Memory, accessed internally via I2C-bus interface (P8xCL884 only) * Amplitude Controlled Oscillator (ACO) suitable for quartz crystal or ceramic resonator * Improved Power-on/Power-off reset (POR) circuitry * Low Voltage Detection (LVD) with 11 software programmable levels * Eight interrupts on Port 1: - Edge or level sensitive triggering selectable via software - Power-saving use for keyboard control. * Twenty source, twenty vector interrupt structure with two priority levels * Wake-up from Power-down mode via LVD or external interrupts at Port 1 * DTMF generator (P8xCL884 only) * MSK modem including Manchester encoder/decoder with 2 digital outputs for analog cordless telephones (standards CT0/CT1/CT1+) * Two standard 16-bit timer/event counters * Additional 16-bit timer/event counter with Capture, Compare and Auto-reload function * Watchdog Timer * Full duplex enhanced UART with double buffering 2 GENERAL DESCRIPTION * I2C-bus interface for serial transfer on two lines, maximum 400 kHz * Very low current consumption * Single supply voltage: 2.7 to 3.6 V * Frequency: 3.58 MHz * Operating temperature: -25 to +70C * 28 pin SO package.
The P8xCL883/P8xCL884 are manufactured in an advanced CMOS technology. The P8xCL883 is based on single-chip technology and the P8xCL884 is based on MCM (Multi-Chip-Module) technology as the EEPROM is integrated on a separate chip. The P8xCL883/P8xCL884 are 8-bit microcontrollers especially suited for low cost analog cordless telephone applications (CT0, CT1, CT1+ standards). For this purpose, features like DTMF, EEPROM, MSK modem and POR/LVD are integrated on-chip. The device is optimized for low power consumption. The P8xCL883/P8xCL884 have two software selectable features for power reduction: Idle and Power-down modes. In addition, all derivative blocks can switch off their clock if they are inactive. The instruction set of the P8xCL883/P8xCL884 is based on that of the 80C51. The P8xCL883/P8xCL884 also function as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 46 two-byte, and 16 three-byte. Due to the missing port P2, there is no external data or memory access and the MOVX operations cannot be used. This data sheet details the specific properties of the P8xCL883/P8xCL884; for details of the P8xCL883/P8xCL884 core and the derivative functions see the "TELX family" data sheet and "Data Handbook IC20; 80C51-based 8-bit Microcontrollers".
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Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
3 ORDERING INFORMATION
P8xCL883; P8xCL884
PACKAGE TYPE NUMBER P87CL883T/000 P87CL884T/000 P87CL883T/xxx P87CL884T/xxx P83CL883T/xxx P83CL884T/xxx Pre-programmed OTP Factory-programmed OTP OTP TYPE NAME Blank OTP SO28 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm VERSION SOT136-1
4
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TELX microcontrollers for CT0 handset/basestation applications
BLOCK DIAGRAM
RX_MUTE (6) T0 (4) INT2 to INT9 (2) 8 VDD VPP VSS TONE (1)
MIN
TX_MUTE (6)
TWO 16-BIT TIMER/ EVENT COUNTERS (T0, T1)
CPU
PROGRAM MEMORY OTP/ROM
DATA MEMORY RAM
MOUT0 (3) DTMF MSK MODEM MOUT1 MOUT2
XTAL1 XTAL2 CLK (2)
ACO
(5)
P87CL883 P87CL884
8-bit internal bus
(1) (2) (3) (4) (5) (6) (7)
Only available on the P8xCL884. Alternative functions of Port 1. MOUT0 is the alternative function of P3.1. Alternative functions of Port 3; T0 is only available on the P8xCL883. In-circuit OTP programming. By software, any I/O pin can be used. Port 3: P3.0, P3.1 and P3.4; P3.4 is only available on the P8xCL883.
handbook, full pagewidth
5
PARALLEL I/O PORTS SERIAL UART PORT 16-BIT TIMER/EVENT COUNTER WITH CAPTURE/ COMPARE (T2) EEPROM (1) I2C-BUS INTERFACE WATCHDOG TIMER (T3) RXD (4) P0 P1 P3 (7) TXD (4) T2 (2) T2EX (2) T2COMP (2) SDA (2) SCL (2) RST
LVD
POR
PORENABLE
MBK981
P8xCL883; P8xCL884
Product specification
Fig.1 Block diagram.
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
5 5.1 PINNING INFORMATION Pinning
P8xCL883; P8xCL884
handbook, halfpage
P0.5 P0.6 P0.7 P3.0/RXD/data P3.1/TXD/clock/MOUT0 RST MIN MOUT1 MOUT2
1 2 3 4 5 6 7 8 9
28 PORENABLE/VPP 27 P0.4 26 P0.3 25 P0.2 24 P0.1 23 P0.0
P83CL883 22 P1.7/INT9/SDA P83CL884 21 P1.6/INT8/SCL P87CL883 P87CL884 20 P3.4/T0 or TONE(1)
19 P1.5/INT7 18 P1.4/INT6/CLK 17 P1.3/INT5 16 P1.2/INT4/T2COMP 15 VSS
MBK005
XTAL1 10 XTAL2 11 P1.0/INT2/T2 12 P1.1/INT3/T2EX 13 VDD 14
(1) Pin 20: P3.4/T0 on the P8xCL883; TONE on the P8xCL884.
Fig.2 Pin configuration.
6
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
5.2 Pin description SYMBOL RST PIN 6
P8xCL883; P8xCL884
DESCRIPTION Active LOW reset. A LOW level on this pin for two machine cycles while the oscillator is running, resets the device. The RST pin is also an output which can be used to reset other ICs. Digital MSK modem input. Digital MSK modem outputs. Crystal input. Input to the Amplitude Controlled Oscillator. Also the input for an externally generated clock source. Crystal output. Output of the Amplitude Controlled Oscillator. To be left unconnected when an external oscillator clock is used. Power supply. Ground. Port 0. 8-bit bidirectional I/O port. Every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. Port 1. 8-bit bidirectional I/O port with alternative functions. Every port pin except P1.6 and P1.7 (I2C-bus pins) can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. Port P1.3 has LED drive capability. Port 1 also serves the alternative functions: INT2 to INT9 interrupts; Timer T2 external inputs T2 and T2EX; Timer T2 compare output T2COMP; external clock output CLK; I2C-bus clock SCL and data in/outputs SDA.
MIN MOUT1 MOUT2 XTAL1 XTAL2 VDD VSS P0.0 to P0.7 P1.0/INT2/T2 P1.1/INT3/T2EX P1.2/INT4/T2COMP P1.3/INT5 P1.4/INT6/CLK P1.5/INT7 P1.6/INT8/SCL P1.7/INT9/SDA P3.0/RXD/data P3.1/TXD/clock/ MOUT0 P3.4/T0
7 8 9 10 11 14 15 23 to 27, 1 to 3 12 13 16 17 18 19 21 22 4 5 20
Port 3. 3 or 2-bit bidirectional I/O port with alternative functions. Every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to Chapter 6.2. Port 3 also serves the alternative functions: RXD/data is the serial port receiver data input (asynchronous) or data I/O (synchronous); TXD/clock is the serial port transmitter data output (asynchronous) or clock output (synchronous) or digital MSK modem output MOUT0; T0 is an external input for Timer 0. P3.4/T0 is only available on the P8xCL883. DTMF output; TONE is only available on the P8xCL884. PORENABLE. Power-on reset circuit enable. If PORENABLE = 1, the internal Power-on reset circuit is enabled. If external reset circuitry is used, it is recommended to keep PORENABLE = 0 to reach lowest power consumption. This pin is also used for the OTP programming voltage VPP.
TONE PORENABLE/VPP
20 28
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Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6 6.1 FUNCTIONAL DESCRIPTION Special Function Registers (SFRs) List of SFRs ADDRESS (HEX) RESET VALUE(1) REGISTER T2CON E0 F0 82 83 no SFR no SFR 87 F3 D0 81 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0111 TH2 TL2 EEPROM interface EECON DTMF HGF LGF Interrupt logic IEN0 IEN1 IEN2 88 8C 8D 8A 8B 89 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 IP0 IP1 IP2 ISE1 IX1 IRQ1 LVD A3 80 8E 8F 90 9E 9F B0 BE BF C1 0000 0000 1111 1111 1111 1111 0000 0000 1111 1111 0011 1111 0000 0000 XXX1 XX11 XXX1 XX11 XXX0 XX00 XXXX XXX0 LVDCON POR/ACO RSTAT MSK MCON MBUF MSTAT UART S0BUF S0CON I2C-bus interface AB AA CB CA 0000 0000 0000 0000 0000 0000 0000 0000 S1ADR S1CON S1DAT S1STA
P8xCL883; P8xCL884
Table 1
REGISTER 80C51 core ACC B DPL DPH PCH PCL PCON PRESC PSW SP T0/T1 TCON TH0 TH1 TL0 TL1 TMOD Port ALTP P0 P0CFGA P0CFGB P1 P1CFGA P1CFGB P3 P3CFGA P3CFGB P4 TIMER2 COMP2H COMP2L RCAP2H RCAP2L
ADDRESS (HEX) C8 CD CC
RESET VALUE(1) 0000 0000 0000 0000 0000 0000
FB
0000 0000
A2 A1
0000 0000 0000 0000
A8 E8 F1 B8 F8 F9 E1 E9 C0
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
F2
0000 0000
E6
XXX0 1000
D3 D1 D2
0000 0000 XXXX XXXX XX00 0000
99 98
0000 0000 0000 0000
DB D8 DA D9
0000 0000 0000 0000 0000 0000 1111 1000
8
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
REGISTER WDT WDCON WDTIM OTP interface OAH OAL ODATA OISYS OTEST D5 D4 D6 DC D7 X00X XXXX XXXX XXXX XXXX XXXX 000X 0000 0000 0000 - 6.2.2 A5 FF 1010 0101 0000 0000 ADDRESS (HEX) RESET VALUE(1)
P8xCL883; P8xCL884
Each port consists of a latch (Special Function Registers P0 to P3), an output driver and input buffer. All ports have internal pull-ups. Figure 3b shows that the strong transistor `p1' is turned on for only one oscillator period after a LOW-to-HIGH transition in the port latch. When on, it turns on `p3' (a weak pull-up) through the inverter IN1. This inverter and transistor `p3' form a latch which holds the logic 1. Port P1.3 has LED drive capability. PORT I/O CONFIGURATION
Reserved locations; do not write reserved Note 1. Where: X = undefined state or not implemented bit. 6.2 6.2.1 I/O facilities PORTS E7, FD
I/O port output configurations are determined by the settings in port configuration SFRs. There are 2 SFRs for each port: PnCFGA and PnCFGB, where `n' indicates the specific port number (0 to 3). One bit in each of the 2 SFRs relates to the output setting for the corresponding port pin, allowing any combination of the 2 output types to be mixed on those port pins. For example, the output type of P1.3, is controlled by the setting of bit 3 in the SFRs P1CFGA and P1CFGB. The port pins may be individually configured via SFRs with one of the following modes (P1.6 and P1.7 can be open-drain or high-impedance but never have any diodes against VDD). These modes are also shown in Fig.3. Mode 0 Open-drain; quasi-bidirectional I/O with n-channel open-drain output. Use as an output requires the connection of an external pull-up resistor; e.g. Port 0 for external memory accesses (EA = 0) or access above the built-in memory boundary. The ESD protection diodes against VDD and VSS are still present; see Fig.3b. Except for the I2C-bus pins P1.6 and P1.7, ports which are configured as open-drain still have a protection diode to VDD. Mode 1 Standard port; quasi-bidirectional I/O with pull-up. The strong pull-up `p1' is turned on for only two oscillator periods after a LOW-to-HIGH transition in the port latch. After these two oscillator periods the port is only weakly driven through `p2' and `very weakly' driven through `p3' (see Fig.3b). Mode 2 High-impedance; this mode turns off all output drivers on a port. Thus, the pin will not source or sink current and may be used as an input-only pin with no internal drivers for an external device to overcome (see Fig.3c). Mode 3 Push-pull; output with drive capability in both polarities. Under this mode, pins can only be used as outputs (see Fig.3d). 9
The P8xCL883/P8xCL884 have 19 and 18 I/O lines respectively, treated as 19 and 18 individually addressable bits or as three parallel 8-bit addressable ports. The alternative functions are detailed below: Port 0 Offers no alternative functions. Port 1 Used for a number of special functions: * P1.0 to P1.7 provides the inputs for the external interrupts INT2 to INT9 * P1.2/T2COMP for external activation and Compare/Auto-reload output function of Timer 2 * P1.4/CLK for the clock output * P1.6/SCL and P1.7/SDA for the I2C-bus interface are real open-drain outputs or high-impedance; no other port configurations are available. Port 2 Not available. Port 3 Pins can be configured individually to provide: * P3.0/RXD/data and P3.1/TXD/clock/MOUT0 which are serial port receiver input and transmitter output (UART) * P3.4/T0 as counter input; available only in P8xCL883. To enable a Port pin alternative function, the Port bit latch in its SFR must contain a logic 1.
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
Tables 2 and 3 show the configuration register settings for the 4 port output types. The electrical characteristics of each output type can be found in Chapter 8. The default port configuration after reset is given in Table 3. Table 2 Port Configuration Registers PnCFGA and PnCFGB (n = 0 to 3) settings
P8xCL883; P8xCL884
MODE(1) Mode 0 Mode 1 Mode 2 Mode 3 Note
PORT OUTPUT MODE PnCFGA 0 1 0 1 PnCFGB NORMAL PORTS 0 0 1 1 open-drain quasi-bidirectional high-impedance push-pull I2C-BUS PORTS (P1.6 AND P1.7) open-drain open-drain high-impedance open-drain
1. Mode changes may cause glitches to occur during transitions. When modifying both registers, WRITE instructions should be carried out consecutively. Table 3 Special Function Registers for port configurations/data REGISTER NAME Port P0 output data(1) Port P0 configuration A Port P0 configuration B Port P1 output data(1) Port P1 configuration A Port P1 configuration B Port P3 output data(1) Port P3 configuration A Port P3 configuration B Notes 1. This means that P0, P1.0 to P1.5 and P3 are initialized in Mode 1 (quasi-bidirectional, driving a weak HIGH) and the I2C-bus ports P1.6 and P1.7 are initialized in Mode 0 (open-drain, not driven). 2. Port pin P3.4 is only available on P8xCL883. REGISTER MNEMONIC P0 P0CFGA P0CFGB P1 P1CFGA P1CFGB P3 P3CFGA P3CFGB SFR ADDRESS (HEX) 80 8E 8F 90 9E 9F B0 BE BF STATE AFTER RESET 1111 1111 1111 1111 0000 0000 1111 1111 0011 1111 0000 0000 XXX1 XX11(2) XXX1 XX11(2) XXX0 XX00(2)
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Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.2.3 ALTERNATIVE PORT FUNCTION REGISTER (ALTP)
P8xCL883; P8xCL884
This 4-bit register selects the alternative function of certain port pins. Table 4 7 - Table 5 BIT 7 to 4 3 2 1 0 Alternative Port Function Register (SFR address A3H) 6 - Description of ALTP bits SYMBOL - EMOUT0 ECLK EMLDY ETONE These 4 bits are reserved. If this bit is set, P3.1 will output the MOUT0 signal. If this bit is set, P1.4 is configured to be push-pull, and P1.4 will output the system clock. If this bit is set, P1.5 is configured to be push-pull, and P1.5 will output the digital MLDY signal of the DTMF generator. If this bit is set, the TONE output of the DTMF generator is enabled. DESCRIPTION 5 - 4 - 3 EMOUT0 2 ECLK 1 EMLDY 0 ETONE
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Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
handbook, full pagewidth
P8xCL883; P8xCL884
VDD this diode is not implemented on the I2C-bus pins I/O pin Q from port latch
VDD external external pull-up
n VSS VSS
MBK004
input data
a. Open-drain.
handbook, full pagewidth
strong pull-up 1 oscillator period p1
VDD
p2 p3 I/O pin
Q from port latch
n VSS
IN1 VSS
MBK001
input data
b. Standard/quasi-bidirectional.
handbook, full pagewidth
VDD this diode is not implemented on the I2C-bus pins input data I/O pin
VSS
MBK002
c. High-impedance.
handbook, full pagewidth
strong pull-up VDD VDD
p I/O pin Q from port latch n VSS input data VSS
MBK003
d. Push-pull. Fig.3 Port configuration options.
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Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.3 Timer/event counters
P8xCL883; P8xCL884
6.3.1.1 Capture mode
The P8xCL883/P8xCL884 contain three 16-bit timer/event counters: Timer 0, Timer 1 and Timer 2 which can perform the following functions: * Measure time intervals and pulse durations * Count events * Generate interrupt requests * Generate output on comparator match. In the `timer' mode the register is incremented every machine cycle. Since a machine cycle consists of minimum 6 oscillator periods, the maximum count rate is 16fosc. In the `counter' mode, the register is incremented in response to a HIGH-to-LOW transition. Since it takes one machine cycle (minimum 6 oscillator periods) to recognize a HIGH-to-LOW transition, the maximum count rate is 1 f 6 osc. To ensure a given level is sampled, it should be held for at least one complete machine cycle. Timer 0 and Timer 1 can be programmed independently to operate in four modes: Mode 0 8-bit timer or 8-bit counter each with divide-by-32 prescaler. Mode 1 16-bit time-interval or event counter. Mode 2 8-bit time-interval or event counter with automatic reload upon overflow. Mode 3 Timer 0 establishes TL0 and TH0 as two separate counters. Note that the T0 input is only available on P8xCL883. 6.3.1 TIMER T2
In the Capture mode, two options may be selected by the EXEN2 bit in T2CON: * If EXEN2 = 0, then Timer 2 is a 16-bit timer or counter which upon overflowing sets the Timer 2 overflow bit TF2, this may then be used to generate an interrupt. * If EXEN2 = 1, Timer 2 operates as described above but with the additional feature that a HIGH-to-LOW transition at external input T2EX causes the current value in TL2 and TH2 to be captured into registers RCAP2L and RCAP2H respectively. In addition, the transition at T2EX causes the EXF2 bit in T2CON to be set; this may also be used to generate an interrupt. The Capture mode is shown in Fig.4.
6.3.1.2
Compare mode
In the Compare mode, each time timer T2 is incremented, the contents of the compare registers COMP2H and COMP2L is compared with the new counter value of timer T2. When a match occurs, the interrupt flag COMP in register T2CON and port bit P1.2 are toggled. The 16-bit value held in these registers is preset by software. The first toggle after a chip reset will set the flag COMP. The Compare mode is shown in Fig.4.
6.3.1.3
Auto-reload mode
In the Auto-reload mode there are also two options selected by the EXEN2 bit in T2CON: * If EXEN2 = 0, then when Timer 2 rolls over, it sets the TF2 bit but also causes the Timer 2 registers to be reloaded with the 16-bit value held in registers RCAP2L and RCAP2H. The 16-bit value held in these registers is preset by software. * If EXEN2 = 1, Timer 2 operates as described above but with the additional feature that a HIGH-to-LOW transition at external input T2EX will also trigger the 16-bit reload and set the EXF2 bit.
Note that the timer T2 of the P8xCL883/P8xCL884 deviates from the timer T2 described in the "TELX family" data sheet. Timer T2 is a 16-bit timer/counter that can operate either as a timer or as an event counter. These functions are selected by the state of the C/T2 bit in the T2CON register. Five operating modes are available: * Capture * Compare * Auto-reload * Compare with Auto-reload * Capture and Compare. These modes are selected via the T2CON register. 13
6.3.1.4
Compare with Auto-reload mode
The Auto-reload mode can also be used together with the Compare mode. The Auto-reload modes are shown in Fig.5.
6.3.1.5
Capture and Compare modes
The Capture and the Compare mode of timer T2 can be used separately or simultaneously. The function is chosen via the bits ECOMP, CP/RL2 and TR2 in register T2CON.
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
P8xCL883; P8xCL884
handbook, full pagewidth
COMP2L
COMP2H
ECOMP
COMPARATOR 1 (16 BITS) OSC 6 C/T2 = 0 TL2 (8 BITS) T2 pin C/T2 = 1 control TR2 capture transition detector T2EX pin control EXEN2 RCAP2L RCAP2H TH2 (8 BITS)
COMP
port P1.2
TF2
Timer 2 interrupt
EXF2
MBH998
Fig.4 Timer 2 in Capture and/or Compare mode.
handbook, full pagewidth
COMP2L
COMP2H
ECOMP
COMPARATOR 1 (16 BITS) OSC 6 C/T2 = 0 TL2 (8 BITS) T2 pin C/T2 = 1 control TR2 reload transition detector T2EX pin control EXEN2 RCAP2L RCAP2H TH2 (8 BITS)
COMP
port P1.2
TF2
Timer 2 interrupt
EXF2
MBH999
Fig.5 Timer 2 in Auto-Reload with/without Compare mode.
14
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Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.3.2 Table 6 7 TF2 Table 7 BIT 7 6 TIMER/COUNTER 2 CONTROL REGISTER (T2CON) Timer/Counter 2 Control Register (SFR address C8H) 6 EXF2 5 COMP 4 ECOMP 3 EXEN2 2
P8xCL883; P8xCL884
1 C/T2
0 CP/RL2
TR2
Description of T2CON bits SYMBOL TF2 EXF2 DESCRIPTION Timer 2 overflow flag. TF2 is set by a Timer 2 overflow and must be cleared by software. Timer 2 external flag. EXF2 is set when either a capture or reload is caused by a negative transition on T2EX and when EXEN2 = 1. When Timer T2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to Timer 2 interrupt routine. EXF2 must be cleared by software. Interrupt flag. When a match between the 16-bit compare register (COMP2L and COMP2H) and the new counter value of timer T2 occurs, the interrupt flag COMP in register T2CON and port bit P1.2 are toggled. Enable compare output bit. When set by software, the controller toggles port bit P1.2 (T2COMP) when a compare match occurs. Timer 2 external enable flag. When set, allows a capture or reload to occur as a result of a negative transition on T2EX. EXEN2 = 0 causes Timer 2 to ignore events at T2EX. Timer 2 start/stop control. Control bit for Timer 2. Timer 2 timer or counter select. C/T2 = 0 selects the internal timer with a clock frequency of 16fosc. C/T2 = 1 selects the external event counter; negative edge-triggered. Capture/reload flag. When set captures will occur on negative transitions at T2EX, if EXEN2 = 1. When cleared, auto-reloads will occur either with Timer 2 overflows or negative transitions at T2EX when EXEN2 = 1.
5
COMP
4 3 2 1
ECOMP EXEN2 TR2 C/T2
0
CP/RL2
Table 8
Timer 2 operating modes CP/RL2 0 1 0 1 0 0 TR2 1 1 1 1 0 0 16-bit Auto-reload 16-bit Capture 16-bit Compare 16-bit Capture and Compare 16-bit Compare with Auto-reload off MODE
ECOMP 0 0 1 1 1 0
15
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.4 MSK modem
P8xCL883; P8xCL884
For controlling this alternative port function the EMOUT0 bit has been added to the Alternative Port Function Register (ALTP); see Section 6.2.3. 6.5 Watchdog Timer
For the P8xCL883/P8xCL884, MIN is no longer the alternative function of P4.0, but MIN is a separate pin. The polarity of MIN can however still be programmed with the P4.0 bit. P4.0 is a data SFR but no port logic is connected. Only the most significant bits of MOUT, i.e. MOUT2 and MOUT1 are directly available as separate pins. In order to be able to further increase the signal quality, the MOUT0 signal is available as an alternative port function of P3.1.
The Watchdog Timer differs from the description in the "TELX family" data sheet in that the external EW pin does not exist on the P8xCL883/P8xCL884.
handbook, full pagewidth
internal reset fosc fosc PRESCALER 13-BIT 8192 COUNTER REGISTER 8-BIT overflow
RST pin
enable
WDCON REGISTER
WDTIM 8-BIT RELOAD REGISTER
internal bus
MBH997
Fig.6 Functional diagram of the Watchdog Timer (T3).
16
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.6 6.6.1 OTP programming OTP PROGRAMMING BY A PROGRAMMER 6.6.2
P8xCL883; P8xCL884
IN-SYSTEM PROGRAMMING MODE
The 8 kbytes One Time Programmable (OTP) memory can be programmed by using a programmer (OM4260) together with a programmer adapter OM5508. Since the memory is programmable only once, programming an already programmed address results in a logical AND of the old and new code. The OTP code can be read out by the programmer for verification.
In the In-System Programming mode the OTP can be programmed under control of the CPU. A program to control programming has to be available in the OTP. This mode can be used to program several bytes in the OTP if the chip is already in a system e.g. to store tuning parameters. In the In-System Programming mode the complete address space OTP can be programmed. The user should take care not to overwrite the existing code. For In-System Programming four SFRs are used to control the OTP. Table 9 SFRs for In-System Programming DESCRIPTION OTP Address High Register OTP Address Low Register OTP Data Register OTP In-System Register
6.6.1.1
Signature bytes
The OTP memory contains three signature bytes which can be read by the programmer to identify the device. A special address space has been used for these bytes which does not influence the user address space. The values of the signature bytes are: (030H) = 15H, indicates manufactured by Philips Semiconductors (031H) = C5H, indicates P8xCL883/P8xCL884 (060H) = 00H, currently not used.
SFR NAME OAH OAL ODATA OISYS
6.6.2.1
OTP In-System Programming Register (OISYS)
The OISYS SFR controls the In-System Programming mode. The data that has to be programmed is stored in the SFR ODATA and the address for this data is held in the SFRs OAH and OAL. Table 10 OTP In-System Programming Register (SFR address DCH) 7 - 6 - 5 - 4 VPon 3 SEC 2 SIG 1 WE 0 InSysMode
Table 11 Description of OISYS bits BIT 7 to 5 4 3 2 1 0 SYMBOL - VPon - SIG WE InSysMode These bits are reserved. VPP status (read only). This bit is reserved. Signature bytes enable. Write Enable, enables programming. In-System Programming status bit. DESCRIPTION
17
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.6.2.2 Mode entry 6.6.2.5
P8xCL883; P8xCL884
Signature bytes
The In-System Programming mode is entered by setting the InSysMode bit of the OISYS SFR. The I2C-bus is used for data transfer in this mode. If the I2C-bus interface is addressed by an external master, the interface generates an interrupt request. The interrupt handler can now read the OISYS SFR and determine the status of the external high voltage (VPon). If high voltage is not present the interrupt is a standard I2C-bus interrupt. If high voltage is present the In-System Program interrupt routine has to start that writes the InSysMode bit (OISYS.0) and controls the address and data transfer. This paragraph is valid for version 2 (`2' ending on type number). During In-System Programming the OTP memory must be in the DC read mode. This is achieved by writing 08H to the OTEST SFR. If the In-System Programming mode is left, 00H must be written into the OTEST SRF. The program voltage must be available and stable for at least 10 s before the mode is entered and has to be stable until the circuit has left the In-System Programming mode. The high voltage can be applied for maximum 60 seconds during the complete lifetime of the circuit.
The signature bytes can be read by setting the SIG bit of the OISYS SFR and applying the address of the signature byte. Applying a write pulse while the SIG bit of the OISYS SFR is HIGH is forbidden although the contents of the signature bytes will never be destroyed.
6.6.2.6
How to connect the PORENABLE/VPP pin in the In-System Programming mode
If the VPP pin is dual-mode (e.g. PORENABLE/VPP), ICs connected to the signal PORENABLE must be able to withstand up to 13 V, i.e. cannot have clamping diodes or low break-down voltages. If the pin is connected to a fixed voltage (VDD or VSS) there must be a way of switching-off this connection on the PCB. One possible implementation is presented in Fig.7 where POR is enabled in normal mode of operation (pin PORENABLE/VPP = 1 by the pull-up), the VPP source must supply enough current in Rp in order to guarantee a minimum 12.5 V on the PORENABLE/VPP pin. Note that if in the application the Power-on reset is disabled (pin PORENABLE/VPP = 0), applying a high voltage to the PORENABLE/VPP pin will also enable the POR circuit. This will cause a reset independent of the actual VDD value. 6.7 Oscillator circuitry
6.6.2.3
Program cycle
The data and address must be supplied to the microcontroller and the control program must write to the SFRs: ODATA, OAH and OAL. A timer has to be initialized for a 100 s cycle and the WE bit of the OISYS SFR must be set. Now the core has to be set into Idle mode. As long as the circuit is in idle mode a programming pulse is applied. After the interrupt request of the timer the OTP is available for normal code fetching. The address applied to the OAH and OAL SFRs must be in the 8 kbytes address space.
General information on the oscillator circuitry can be found in the "TELX family" data sheet. 6.7.1 RESONATOR REQUIREMENTS
For correct function of the oscillator, the values of R1 and C0 of the chosen resonator (quartz or PXE) must be below the line shown in Fig.8a. The value of the parallel resistor R0 must be less than 47 k. The wiring between chip and resonator should be kept as short as possible. 6.7.2 RECOMMENDED RESONATOR TYPES
6.6.2.4
Verify for In-System Programming
Verify is done in similar way as programming. The circuit is put into Idle mode and at the start of this mode the sense amplifiers are switched to verify mode and a read cycle is started. The timer must be initialized for a cycle of at least 1 s. The address is supplied by the SFRs OAH and OAL. The WE bit of the OISYS SFR has to be reset. The OTP output data is latched in the ODATA SFR. After Idle mode is finished this SFR can be read in a normal way. To ensure that the verified data is written into the SFR it is advised to write FFH into the ODATA SFR before a verify is started.
* CSA 3.58MG (supplier Murata) * FCR3.58M5 (supplier TDK).
18
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
P8xCL883; P8xCL884
handbook, halfpage
500
MDA088
R1 () 400
handbook, halfpage
VDD Rp 300
(1) (2) (3)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
MBK006
28 27 26 25 24 0 23 0 20 40 60 Co (pF) 80 100 VPP pad on PCB 200
P83CL883 P83CL884 22 P87CL883 21 P87CL884
20 19 18 17 16 15
C1e and C2e are the external load capacitances; normally not needed due to integrated load capacitances of typically 10 pF. (1) C1e = C2e = 22 pF. (2) C1e = C2e = 0 pF. (3) C1e = C2e = 12 pF.
a. Resonator curves.
handbook, halfpage
C1
L1 R0
R1
MGL137
C0
b. Resonator equivalent circuit.
Fig.7
PORENABLE/VPP connection on a PCB.
Fig.8 Resonator requirements for the ACO.
19
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
6.8 Emulation
P8xCL883; P8xCL884
The emulator for the P8xCL883/P8xCL884 uses the P87CL880 microcontroller in emulation mode. The P87CL880 is a super-set of the P8xCL883/P8xCL884, i.e. it contains all the functions of the P8xCL883/P8xCL884 plus a number of other additional functions. It should be noted that some functional differences between P87CL880 and P8xCL883/P8xCL884 exist; see Table 12. Table 12 Differences between functions existing in P87CL880 and P8xCL883/P8xCL884 FUNCTION Timer 2 OTP Program Memory RAM EW pin (Watchdog enable) Security concept In-System Programming Reset value of SFRs POR Frequency Package 6.9 6.9.1 Non-conformance PROGRAMMING INTERFACE/TRANSPARENT MODE P87CL880 see P87CL880 specification 32 kbytes AFPROM 512 bytes yes see P87CL880 specification no see P87CL880 specification hardware programmable DC to 12.5 MHz QFP64 P8XCL883/P8XCL884 see P8xCL883/P8xCL884 specification 8 kbytes EPROM or pre-programmed ROM 256 bytes no see P8xCL883/P8xCL884 specification yes see P8xCL883/P8xCL884 specification fixed 3.58 MHz SO28 A software workaround for this problem exists. During the initialisation sequence: * Enable LVD by writing to register LVDCON * Enable LVD interrupt by writing to register IEN2 * Clear the LVDI bit by writing to LVDCON a second time * Set bit EA in register IEN0 (ensures LVDI to be cleared after initialisation). 6.9.3 EDGE DETECTION ON UART
The Transparent mode is a special operating mode of the microcontroller used for parallel and In-System OTP programming. For certain combinations of data written to Port 1 (used for control signal during parallel programming mode) the Transparent mode may be incorrectly active during normal operation of the microcontroller. In this case, a transition on any of Port 0 pins can influence the read out of the on-chip program memory, resulting in incorrect code execution. To avoid this problem, the InSysMode bit in the OTP In-System Programming Register (SFR address DCH) must be set in the start-up sequence of the program code. Apart from preventing incorrect operation as described above, the setting of this bit does not affect the normal operation. 6.9.2 LOW VOLTAGE DETECTION
In receive mode 1, 2 and 3 it is possible that an internal setup/hold condition of a flip-flop is violated. This results in a not detected start bit (start condition) during receive mode. The probability of occurrence (verified on sampling basis) is below 3%. There is no workaround for this problem other than to use the UART only in Mode 0 for reception.
The LVDI bit (LVDCON.6) may incorrectly be set due to a glitch on the LVD output, when the LVD is enabled, by changing the bits LVDCON(3:0) from `0000' to any value within the range `0001' to `0101'. If bit EA in register IEN0 is enabled, an unwanted interrupt may occur.
20
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
7 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI Ptot Tstg supply voltage input voltage on any pin with respect to ground (VSS) total power dissipation storage temperature PARAMETER
P8xCL883; P8xCL884
MIN. -0.5 -0.5 - -65
MAX. +4.0 800 +150 V VDD + 0.5 V
UNIT
mW C
8 CHARACTERISTICS VDD = 2.7 to 3.6 V; VSS = 0 V; fxtal = 3.58 MHz; Tamb = -25 to +70 C; Tamb (during In-System Programming) = +20 to +40 C; all voltages with respect to VSS unless otherwise specified. SYMBOL Supply VDD supply voltage operating RAM data retention in Power-down mode In-System Programming VPP IDD OTP programming voltage operating supply current VDD = 3 V; note 1 VDD = 3 V; Tamb = 25 C; note 1; see Fig.10 IDD(id) supply current Idle mode VDD = 3 V; note 2 VDD = 3 V; Tamb = 25 C; note 2; see Fig.11 IDD(pd) supply current Power-down mode VDD = 3 V; Tamb = 25 C; note 3; see Fig.12 POR and LVD enabled - POR and LVD disabled - IDD(block) supply current per block: EEPROM erase/write DTMF MSK modem Watchdog I2C-bus UART Timer T2 Timer T0 or T1 no load on TONE output VDD = 3 V; Tamb = 25 C; notes 4 and 5 - - - - - - - - 460 240 140 110 90 90 90 5 - - - - - - - - A A A A A A A A 2 100 5 - A nA 2.7 1.0 3.0 12.5 - - - - - - - - - 1.8 - 0.38 3.6 3.6 3.6 13.0 3.0 - 0.55 - V V V V mA mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
21
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
SYMBOL PARAMETER CONDITIONS
P8xCL883; P8xCL884
MIN. -
TYP.
MAX.
UNIT
Inputs (Ports, MIN, RST, MOUT0 to MOUT2, PORENABLE) VIL VIH IIL IIL(T) ILI IOL IOL1 IOL2 IOH IOH1 IOH2 IRST LOW-level input voltage HIGH-level input voltage LOW-level input current (ports in Mode 1) LOW-level input current; HIGH-to-LOW transition (ports in Mode 1) notes 6 and 7 note 6 VIN = 0.4 V; note 8; see Fig.9 VIN = 0.5VDD; note 8; see Fig.9 0 - - - 0.2VDD V VDD 50 1000 1 - - - - - - - 2.5 V A A A 0.8VDD - 10 200 - - - - - - - 0.2 0.6
input leakage current (ports in Mode 0 or 2) VSS VI VDD LOW-level output current; except P1.3, SDA, SCL and MOUT2 LOW-level output current; P1.3 (for LED) LOW-level output current; SDA, SCL and MOUT2 HIGH-level output current except P1.3; push-pull options only HIGH-level output current P1.3 (for LED); push-pull options only HIGH-level output current MOUT2 RST pull-up transistor current VOL = 0.4 V VOL = 0.4 V VOL = 0.4 V; note 9 VOH = VDD - 0.4 V VOH = VDD - 0.4 V VOH = VDD - 0.4 V VDD = 3 V; VOH = VDD - 0.4 V VDD = 3 V; VOH = VSS
Port outputs (Ports, RST, MOUT0 to MOUT2) 2 6 3 2 6 3 0.05 - mA mA mA mA mA mA A A
Power-on reset (POR); for the LVD (Low Voltage Detection) see note 10 VPORH VPORL Power-on reset trip level HIGH Power-on reset trip level LOW option 5 in "TELX family" specification option A in "TELX family" specification 2.13 1.98 2.37 2.27 2.61 2.56 V V
TONE output (note 11 and Fig.13) VHG(rms) VLG(rms) f/f VDC VG THD HGF voltage (RMS) LGF voltage (RMS) frequency deviation DC voltage level pre-emphasis of group total harmonic distortion VDD = 3 V; Tamb = 25 C; notes 5 and 12 VDD = 3 V 158 125 -0.6 - 1.5 - 181 142 - 2.0 25 205 160 +0.6 2.5 - mV mV % V dB dB
0.5VDD -
EEPROM (notes 5 and 13) tE/W NE/W tDR erase/write time erase/write cycles data retention time Tamb = +70 C 8 105 10 10 - - 12 - - years ms
22
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
SYMBOL PARAMETER CONDITIONS
P8xCL883; P8xCL884
MIN.
TYP.
MAX.
UNIT s s s s mA
In-System Programming for the OTP tprog tver tVpp(setup) tVpp(max) IVpp VXTAL1 Zi(XTAL1) C1i; C2i Notes 1. The operating supply current is measured with all output pins disconnected; VIL = VSS; VIH = VDD; RST = VDD; XTAL1 driven with square wave; XTAL2 not connected; fetch of NOP instructions; all derivative blocks disabled. 2. The Idle mode supply current is measured with all output pins and RST disconnected; VIL = VSS; VIH = VDD; XTAL1 driven with square wave; XTAL2 not connected; all derivative blocks disabled. 3. The Power-down current is measured with all output pins and RST disconnected; VIL = VSS; VIH = VDD; XTAL1 and XTAL2 not connected;. 4. The typical currents are only for the specific block. To calculate the typical power consumption of the microcontroller, the current consumption of the CPU must be added. Example: the typical current consumption of the microcontroller in operating mode with CPU, Watchdog and UART active can be calculated as (1.8 + 0.11 + 0.09) mA = 2.0 mA. 5. Verified on sampling basis. 6. The input threshold voltage of P1.6/SCL and P1.7/SDA meet the I2C-bus specification. Therefore, an input voltage below 0.3VDD will be recognized as a logic 0 and an input voltage above 0.7VDD will be recognized as a logic 1. 7. For pin PORENABLE the VIL(max) = 0.1VDD. 8. Not valid for pins SDA, SCL, RST, MIN and PORENABLE. 9. The maximum allowed load capacitance CL is in this case limited to around 200 pF. 10. The LVD is tested according to the specification in the data sheet "TELX family; Chapter: Low Voltage Detection". 11. Values are specified for DTMF frequencies only (CEPT CS203). 12. Related to the Low Group Frequency (LGF) component (CEPT CS203). 13. After final testing the value of each EEPROM bit is typically logic 1. 14. Can also be done by two 100 s pulses. 15. C1i and C2i are the total internal capacitances (including gate capacitance, leadframe capacitance). program cycle time verify cycle time program voltage setup time maximum program voltage time program voltage current cumulative for the product lifetime In-System Programming 90 1 10 - - 100 - - - - - 1000 10 110 - - 60 40
ACO (Amplitude Controlled Oscillator) external clock signal amplitude peak-to-peak input impedance on XTAL1 input capacitance on XTAL1 and XTAL2 notes 5 and 15 500 300 - VDD - - mV k pF
23
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
P8xCL883; P8xCL884
handbook, full pagewidth
500 A
MGL506
II
I IL(T)
10 A 0
IIL 0.3VDD 0.5VDD VDD
Fig.9 Input current.
MGL628
MGL627
handbook, halfpage
2.5
handbook, halfpage
0.6
IDD (mA) 2.2
IDD(id) (mA) 0.5
1.9
0.4
1.6
0.3
1.3 2.2
2.6
3
3.4
3.8 4.2 VDD (V)
0.2 2.2
2.6
3
3.4
3.8 4.2 VDD (V)
Fig.10 Typical operating current as a function of VDD, Tamb = 25 C.
Fig.11 Typical Idle current as a function of VDD, Tamb = 25 C.
24
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
P8xCL883; P8xCL884
handbook, halfpage
4
MDA085
IDD(pd) (A)
(1)
3
handbook, halfpage VDD
(2)
2 1 F
1
DEVICE TYPE NUMBER (1)
(3)
TONE
50 pF
(4)
10 k
0 0 1 2 3 VDD (V) 4
VSS
MGB835
(1) (2) (3) (4)
POR and LVD enabled (Tamb = 70 C). POR and LVD enabled (Tamb = 25 C). POR and LVD disabled (Tamb = 70 C). POR and LVD disabled (Tamb = 25 C). (1) P8xCL883/P8xCL884.
Fig.12 Typical Power-down current as a function of VDD.
Fig.13 TONE output test circuit.
25
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
9 PACKAGE OUTLINE
P8xCL883; P8xCL884
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
26
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
10 SOLDERING 10.1 Introduction to soldering surface mount packages
P8xCL883; P8xCL884
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 10.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 10.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 10.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
27
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
10.5
P8xCL883; P8xCL884
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE REFLOW(1) suitable suitable suitable suitable suitable
BGA, SQFP PLCC(3), SO, SOJ
not suitable suitable(2) suitable not recommended(3)(4) not recommended(5)
HLQFP, HSQFP, HSOP, HTSSOP, SMS not LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
28
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
11 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
P8xCL883; P8xCL884
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 12 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 13 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
29
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
NOTES
P8xCL883; P8xCL884
30
Philips Semiconductors
Product specification
TELX microcontrollers for CT0 handset/basestation applications
NOTES
P8xCL883; P8xCL884
31
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 489 4339/4239, Fax. +30 1 481 4240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
SCA62
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465008/00/02/pp32
Date of release: 1999 Mar 15
Document order number:
9397 750 05027

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